1. Field of the Invention
The present invention relates to power consumption within an Integrated Circuit (“IC”). The present invention more particularly relates to optimization techniques to control power consumption within an IC.
2. Description of Related Art
Power consumption in integrated circuit (“IC”) devices, including application specific IC (“ASIC”) devices and system-on-chip (“SOC”) devices, is dependent on both voltage and frequency. Increased power consumption necessitates the use of larger power supplies and more efficient cooling systems and is particularly problematic in portable, handheld devices. Increased power typically is resolved by providing more powerful batteries and cooling requirements thereby limiting the ability to produce smaller, lighter devices.
Many current systems are designed to accommodate a highest anticipated frequency of operation and suffer from relatively low percentage of productive processing cycles because processors in the systems are idle for large portions of time. Other current systems compromise performance to achieve lower power consumption. Another compromise commonly found in current devices monitors system activity and powers down the current devices to conserve battery life. Such compromises are prevalent in battery-powered portable devices.
Therefore, it would be desirable to have a system that can deliver high-performance operation on demand and can further minimize power usage in systems that have variable performance requirements.